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| ? 2011 microchip technology inc. ds22276a-page 1 mcp1754/mcp1754s features ? high psrr: >70 db @ 1 khz typical ? 56.0 a typical quiescent current ? input operating voltage range: 3.6v to16.0v ? 150 ma output current for all output voltages ? low drop out voltage, 300 mv typical @ 150 ma ? 0.4% typical output voltage tolerance ? standard output voltage options (1.8v, 2.5v, 2.8v, 3.0v, 3.3v, 4.0v, 5.0v) ? output voltage range 1.8v to 5.5v in 0.1v increments (tighter increments also possible per design) ? output voltage tolerances of 2.0% over entire temperature range ? stable with minimum 1.0 f output capacitance ? power good output ? shutdown input ? true current foldback protection ? short-circuit protection ? overtemperature protection applications ? battery-powered devices ? battery-powered alarm circuits ? smoke detectors ?co 2 detectors ? pagers and cellular phones ? smart battery packs ?pdas ?digital cameras ? microcontroller power ? consumer products ? battery-powered data loggers related literature ? an765, ?using microchip?s micropower ldos?, ds00765, microchip technology inc., 2007 ? an766, ?pin-compatible cmos upgrades to bipolar ldos?, ds00766, microchip technology inc., 2003 ? an792, ?a method to determine how much power a sot23 can dissipate in an application?, ds00792, microchip technology inc., 2001 description the mcp1754/mcp1754s is a family of cmos low dropout (ldo) voltage regulators that can deliver up to 150 ma of current while consuming only 56.0 a of quiescent current (typical). the input operating range is specified from 3.6v to 16.0v, making it an ideal choice for four to six primary cell battery-powered applications, 12v mobile applications and one- to three-cell li-ion- powered applications. the mcp1754/mcp1754s is capable of delivering 150 ma with only 300 mv (typical) of input to output voltage differential. the output voltage tolerance of the mcp1754/mcp1754s is typically 0.4% at +25c and 2.0% maximum over the operating junction temperature range of -40c to +125c. line regulation is 0.01% typical at +25c. output voltages available for the mcp1754/mcp1754s range from 1.8v to 5.5v. the ldo output is stable when using only 1 f of output capacitance. ceramic, tantalum or aluminum electrolytic capacitors may all be used for input and output. overcurrent limit and overtemperature shutdown provide a robust solution for any application. the mcp1754/mcp1754s family introduces a true current foldback feature. when the load impedance decreases beyond the mcp1754/mcp1754s load rating, the output current and voltage will gracefully foldback towards 30 ma at about 0v output. when the load impedance decreases and returns to the rated load, the mcp1754/mcp1754s will follow the same foldback curve as the device comes out of current foldback. package options for the mcp1754s include the sot- 23a, sot-89-3, sot-223-3 and 2x3 dfn-8. package options for the mcp1754 include the sot-23- 5, sot-223-5, and 2x3 dfn-8. 150 ma, 16v, high performance ldo
mcp1754/mcp1754s ds22276a-page 2 ? 2011 microchip technology inc. package types - mcp1754s package types - mcp1754 1 3 2 v in gnd v out 123 v in gnd v out 3-pin sot-23a 3-pin sot-89 gnd tab will be connected to gnd 8-lead 2x3 dfn (*) 1 2 3 sot-223-3 4 gnd v in v out gnd 2 nc nc gnd nc nc 1 2 3 4 8 7 6 5 gnd v in v out ep 9 * includes exposed thermal pad (ep); see ta bl e 3 - 2 . (note: the 3-lead sot-223 (db) is not a standard package for output voltages below 3.0v) 1 2 sot23-5 12 3 sot-223-5 45 pin function 1 /shdn 5 pwrgd 3 gnd 4 vout 2 vin 4 3 5 pin function 4 pwrgd 2 gnd 1 vin 5 vout 3 /shdn tab will be connected to gnd 8-lead 2x3 dfn (*) 3 nc pwrgd gnd nc nc 1 2 3 4 8 7 6 5 shdn v in v out ep 9 * includes exposed thermal pad (ep); see ta b l e 3 - 1 . ? 2011 microchip technology inc. ds22276a-page 3 mcp1754/mcp1754s functional block diagrams + - mcp1754s v in v out gnd +v in error amplifier voltage reference over current over temperature mcp1754/mcp1754s ds22276a-page 4 ? 2011 microchip technology inc. typical application circuits ea + ? v out pmos r f c f i sns overtemperature v ref comp 92% of v ref t delay v in driver w/limit and shdn gnd soft-start sense undervoltage lock out v in reference shdn shdn shdn sensing (uvlo) pwrgd mcp1754 mcp1754s c in 1f ceramic c out 1f ceramic v out 5.0v i out 30 ma v in v out 12v + gnd ? 2011 microchip technology inc. ds22276a-page 5 mcp1754/mcp1754s 1.0 electrical characteristics absolute maximum ratings ? input voltage, v in ..................................................................+ 17.6v vin, pwrgd, shdn ..................... (gnd-0.3v) to (v in +0.3v) vout .................................................. (gnd-0.3v) to (+5.5v) internal power dissipation ............ internally-limited ( note 6 ) output short circuit current ................................. continuous storage temperature .....................................-55c to +150c maximum junction temperature ......................165c( note 7 ) operating junction temperature...................-40c to +150c esd protection on all pins .......... 4 kv hbm and 200v mm ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this s pecification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ac/dc characteristics electrical specifications: unless otherwise specified, all limits are established for v in = v r + 1v, note 1 , i load = 1 ma, c out = 1 f (x7r), c in = 1 f (x7r), t a = 25c, t r(vin) = 0.5v/s, shdn = v in , pwrgd = 10k to v out . boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c. parameters sym min typ max units conditions input / output characteristics input operating voltage v in 3.6 ? 16.0 v output voltage operating range v out-range 1.8 ? 5.5 v input quiescent current i q ?56 90 a i l = 0 ma input quiescent current for shdn mode i shdn ?0.1 5 a shdn = gnd ground current i gnd ?150 250 a i load = 150 ma maximum output current i out_ma 150 ?? ma output soft current limit i out_cl ?250 ? mav in = v in(min) , v out 0.1v, current measured 10 ms after load is applied output pulse current limit i out_cl ? 250 ? ma pulse duration < 100 ms, duty cycle < 50%, v out 0.1v, note 6 output short circuit foldback current i out_sc ?30 ? mav in = v in(min) , v out = gnd output voltage overshoot on startup v over ?0.5 ? %v out v in = 0 to 16v, i load = 150 ma note 1: the minimum v in must meet two conditions: v in 3.6v and v in v r + v dropout(max) . 2: v r is the nominal regulator output voltage when the input voltage v in = v rated + v dropout(max) or vi in = 3.6v (which- ever is greater); i out = 1 ma. 3: tcv out = (v out-high - v out-low ) *10 6 / (v r * temperature), v out-high = highest voltage measured over the temperature range. v out-low = lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperatur e using low duty cycle pulse testing. changes in output voltage due to heating effects are determined using thermal regulation specification tcv out . 5: dropout voltage is defined as the input to output differentia l at which the output voltage drops 2% below its nominal v r measured value. the nominal vr measured value is obtained with 6: the maximum allowable power dissipation is a function of am bient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operating junction temper ature to exceed the maximum 150c rating. sustained junction temperatures above 150c c an impact the device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. mcp1754/mcp1754s ds22276a-page 6 ? 2011 microchip technology inc. output voltage regulation v out v r - 2.0% v r 0. 2% v r +2.0 % v note 2 v out temperature coefficient tcv out ?22 ppm/c note 3 line regulation v out / (v out x v in ) -0.05 0.01 +0.05 %/v v r + 1v v in 16v load regulation v out /v out -1.1 -0.4 0 %i l = 1.0 ma to 150 ma, note 4 dropout voltage ( note 5 )v dropout ?300 500 mv i l = 150 ma dropout current i do ?50 85 a v in = 0.95v r , i out = 0 ma undervoltage lockout undervoltage lockout uvlo ? 2.95 ? v rising v in undervoltage lockout hysterisis uvlo hys ? 285 ? mv falling v in shutdown input logic high input v shdn-high 2.4 ?v in(max) v logic low input v shdn-low 0.0 ? 0.8 v shutdown input leakage current shdn ilk ? ? 0.100 0.500 0.500 2.0 a shdn = gnd shdn = 16v power good output pwrgd input voltage operating range v pwrgd_vin 1.7 ?v in vi sink = 1 ma pwrgd threshold volt- age (referenced to v out ) v pwrgd_th 90 92 94 %v out falling edge of v out pwrgd threshold hysteresis v pwrgd_hys ?2.0 ? %v out rising edge of v out pwrgd output voltage low v pwrgd_l ?0.2 0.6 vi pwrgd_sink = 5.0 ma, v out = 0v pwrgd output sink current i pwrgd_l 5.0 ?? mav pwrgd 0.4v pwrgd leakage current i pwrgd_lk ?40 700 na v pwrgd pullup = 10 k to v in, v in = 16v ac/dc characteristics (continued) electrical specifications: unless otherwise specified, all limits are established for v in = v r + 1v, note 1 , i load = 1 ma, c out = 1 f (x7r), c in = 1 f (x7r), t a = 25c, t r(vin) = 0.5v/s, shdn = v in , pwrgd = 10k to v out . boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c. parameters sym min typ max units conditions note 1: the minimum v in must meet two conditions: v in 3.6v and v in v r + v dropout(max) . 2: v r is the nominal regulator output voltage when the input voltage v in = v rated + v dropout(max) or vi in = 3.6v (which- ever is greater); i out = 1 ma. 3: tcv out = (v out-high - v out-low ) *10 6 / (v r * temperature), v out-high = highest voltage measured over the temperature range. v out-low = lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperat ure using low duty cycle pulse testing. changes in output voltage due to heating effects are determined using thermal regulation specification tcv out . 5: dropout voltage is defined as the input to output differentia l at which the output voltage drops 2% below its nominal v r measured value. the nominal vr measured value is obtained with 6: the maximum allowable power dissipation is a function of am bient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operating junction temper ature to exceed the maximum 150c rating. sustained junction temperatures above 150c c an impact the device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. ? 2011 microchip technology inc. ds22276a-page 7 mcp1754/mcp1754s pwrgd time delay t pg ? 100 ? s rising edge of v out , r pullup = 10 k detect threshold to pwrgd active time delay t vdet_pwrgd ? 200 ? s falling edge of v out after transition from v out = v prwrgd_th + 50 mv, to v pwrgd_th - 50 mv, r pullup = 10k to v in ac performance output delay from v in to v out = 90% v reg t delay ?240 ? sv in = 0v to 16v, v out = 90% v r , t r (vin) = 5v/s, c out = 1 f, shdn = v in output delay from v in to v out > 0.1v t delay_start ?80 ? sv in = 0v to 16v, v out 0.1v, t r (vin) = 5v/s, c out = 1 f, shdn = v in output delay from shdn t delay_shdn ?160 ? sv in = 16v, v out = 90% v r , c out = 1 f, shdn = gnd to v in output noise e n ?3 ?v/(hz) 1/2 i l = 50 ma, f = 1 khz, c out = 1 f power supply ripple rejection ratio psrr ? 72 ? db v r = 5v, f = 1 khz, i l = 150 ma, v inac = 1v pk-pk, c in = 0 f, v in = v r + 1.5v thermal shutdown temperature t sd ?150 ? c note 6 thermal shutdown hysteresis tsd ? 10 ? c ac/dc characteristics (continued) electrical specifications: unless otherwise specified, all limits are established for v in = v r + 1v, note 1 , i load = 1 ma, c out = 1 f (x7r), c in = 1 f (x7r), t a = 25c, t r(vin) = 0.5v/s, shdn = v in , pwrgd = 10k to v out . boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c. parameters sym min typ max units conditions note 1: the minimum v in must meet two conditions: v in 3.6v and v in v r + v dropout(max) . 2: v r is the nominal regulator output voltage when the input voltage v in = v rated + v dropout(max) or vi in = 3.6v (which- ever is greater); i out = 1 ma. 3: tcv out = (v out-high - v out-low ) *10 6 / (v r * temperature), v out-high = highest voltage measured over the temperature range. v out-low = lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperatur e using low duty cycle pulse testing. changes in output voltage due to heating effects are determined using thermal regulation specification tcv out . 5: dropout voltage is defined as the input to output differentia l at which the output voltage drops 2% below its nominal v r measured value. the nominal vr measured value is obtained with 6: the maximum allowable power dissipation is a function of am bient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operating junction temper ature to exceed the maximum 150c rating. sustained junction temperatures above 150c c an impact the device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant. mcp1754/mcp1754s ds22276a-page 8 ? 2011 microchip technology inc. temperature specifications ( note 1 ) parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 +125 c operating temperature range t j -40 +150 c storage temperature range t a -55 +150 c thermal package resistance thermal resistance, sot-223-3 ja jc ? ? 62 15 ? ? c/w thermal resistance, sot-223-5 ja jc ? ? 62 15 ? ? c/w thermal resistance, sot-23a-3 ja jc ? ? 336 110 ? ? c/w thermal resistance, sot-89-3 ja jc ? ? 153.3 100 ? ? c/w thermal resistance, 2x3 dfn ja jc ? ? 93 26 ? ? c/w note 1: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operating junction temper ature to exceed the maximum 150c rating. sustained junction temperatures above 150c can impact the device reliability. ? 2011 microchip technology inc. ds22276a-page 9 mcp1754/mcp1754s 2.0 typical performance curves note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. note: junction temperature (t j ) is approximated by soaking t he device under test to an ambient temperature equal to the desired junction temperature. the test time is small enough such that the rise in junction temperature over the ambient temperature is not significant. figure 2-1: quiescent current vs. input voltage. figure 2-2: quiescent current vs. input voltage. figure 2-3: quiescent current vs. input voltage. figure 2-4: ground current vs. load current. figure 2-5: quiescent current vs. junction temperature. figure 2-6: quiescent current vs. input voltage. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 40 50 60 70 80 345678910111213141516 quiescent current (a) input voltage (v) v out = 1.8v i out = 0 a +25 c +130 c -45 c 0 c +90 c 40 45 50 55 60 65 70 3579111315 quiescent current (a) input voltage (v) v out = 3.3v i out = 0 a +25 c +130 c -45 c 0 c +90 c 0 10 20 30 40 50 60 70 80 1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 quiescent current (a) input voltage (v) v out = 5.0v i out = 0 a +25 c +130 c -45 c 0 c +90 c 40 60 80 100 120 140 160 180 0 20 40 60 80 100 120 140 160 gnd current (a) load current (ma) v out = 5.0v v out = 3.3v v out = 1.8v 0 10 20 30 40 50 60 70 80 -45 -20 5 30 55 80 105 130 quiescent current (a) junction temperature (c) v out = 5.0v v out = 1.8v v out = 3.3v 0 10 20 30 40 50 60 70 80 0 2 4 6 8 10 12 14 16 18 quiescent current (a) input voltage (v) v out = 5.0v +25 c mcp1754/mcp1754s ds22276a-page 10 ? 2011 microchip technology inc. note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. figure 2-7: output voltage vs. input voltage. figure 2-8: output voltage vs. input voltage. figure 2-9: output voltage vs. input voltage. figure 2-10: output voltage vs. load current. figure 2-11: output voltage vs. load current. figure 2-12: output voltage vs. load current. 1.800 1.802 1.804 1.806 1.808 1.810 1.812 1.814 345678910111213141516 output voltage (v) input voltage (v) v out = 1.8v +25 c +130 c -45 c 0 c +90 c 3.290 3.292 3.294 3.296 3.298 3.300 3.302 3.304 3.306 3.308 3.310 45678910111213141516 output voltage (v) input voltage (v) v out = 3.3v +25 c +130 c -45 c 0 c +90 c 5.000 5.004 5.008 5.012 5.016 5.020 6 7 8 9 10 11 12 13 14 15 16 output voltage (v) input voltage (v) v out = 5.0v +25 c +130 c -45 c 0 c +90 c 1.790 1.795 1.800 1.805 1.810 1.815 0 25 50 75 100 125 150 output voltage (v) load current (ma) v out = 1.8v 25 c 90 c 130 c 0 c -45 c 3.280 3.285 3.290 3.295 3.300 3.305 3.310 0 25 50 75 100 125 150 output voltage (v) load current (ma) v out = 3.3v 25 c 90 c 0 c -45 c 130 c 4.980 4.985 4.990 4.995 5.000 5.005 5.010 5.015 5.020 0 25 50 75 100 125 150 output voltage (v) load current (ma) v out = 5.0v 25 c 90 c 0 c -45 c 130 c ? 2011 microchip technology inc. ds22276a-page 11 mcp1754/mcp1754s note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. figure 2-13: dropout voltage vs. load current. figure 2-14: dropout voltage vs. load current. figure 2-15: dynamic line response. figure 2-16: dynamic line response. figure 2-17: short circuit current vs. input voltage. 0.000 0.100 0.200 0.300 0.400 0.500 0 15 30 45 60 75 90 105 120 135 150 dropout voltage (v) load current (ma) v out = 3.3v +25 c +130 c -45 c 0 c +90 c 0.000 0.050 0.100 0.150 0.200 0.250 0.300 0.350 0.400 0 15 30 45 60 75 90 105 120 135 150 dropout voltage (v) load current (ma) v out = 3.3v +25 c +130 c -45 c 0 c +90 c 0 10 20 30 40 50 46810121416 short circuit current (ma) input voltage (v) v out = 3.3v 25 c 90 c 130 c 0 c -45 c mcp1754/mcp1754s ds22276a-page 12 ? 2011 microchip technology inc. note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. figure 2-18: load regulation vs. temperature. figure 2-19: load regulation vs. temperature. figure 2-20: load regulation vs. temperature. figure 2-21: line regulation vs. temperature. figure 2-22: line regulation vs. temperature. figure 2-23: line regulation vs. temperature. -1.50 -1.40 -1.30 -1.20 -1.10 -1.00 -0.90 -0.80 -0.70 -0.60 -0.50 -45 -20 5 30 55 80 105 130 load regulation (%) temperature (c) v out =1.8v iout = 1 ma to 150 ma v in = 12v v in = 16v v in = 10v v in = 5v v in = 3.6v -1.00 -0.80 -0.60 -0.40 -0.20 0.00 -45 -20 5 30 55 80 105 130 load regulation (%) temperature (c) v out =3.3v iout = 1 ma to 150 ma v in = 16v v in = 5v v in = 10v v in = 12v v in = 4.3v -1.00 -0.80 -0.60 -0.40 -0.20 0.00 -45 -20 5 30 55 80 105 130 load regulation (%) temperature (c) v out =3.3v iout = 1 ma to 150 ma v in = 16v v in = 5v v in = 10v v in = 12v v in = 4.3v -0.03 -0.02 -0.01 0.00 0.01 -45 -20 5 30 55 80 105 130 line regulation (%/v) temperature (c) v out =1.8v 150 ma 0 ma 50 ma 100 ma 10 ma -0.03 -0.02 -0.01 0.00 0.01 -45 -20 5 30 55 80 105 130 line regulation (%/v) temperature (c) v out =3.3v 150 ma 0 ma 50 ma 100 ma 10 ma -0.03 -0.02 -0.01 0.00 0.01 -45 -20 5 30 55 80 105 130 line regulation (%/v) temperature (c) v out =5v 150 ma 0 ma 50 ma 100 ma 10 ma ? 2011 microchip technology inc. ds22276a-page 13 mcp1754/mcp1754s note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. figure 2-24: power supply ripple rejection vs. frequency. figure 2-25: power supply ripple rejection vs. frequency. figure 2-26: output noise vs. frequency (3 lines, v r = 1.2v, 3.3v, 5.0v). figure 2-27: power up timing. figure 2-28: startup from shutdown. figure 2-29: short circuit current foldback. -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 psrr (db) frequency (khz) v out =1.8v v in =6.5v v inac = 1 v p-p c in =0 f i out = 10 ma i out = 150 ma -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 psrr (db) frequency (khz) v out =5.0v v in =6.5v v inac = 1v p-p c in =0 f i out = 160 ma i out = 40 ma 0.001 0.010 0.100 1.000 10.000 0.01 0.1 1 10 100 1000 noise (v/hz) frequency (khz) v out =5.0v, v in =6.0v i out =50ma v out =3.3v, v in =4.3v v out =1.8v, v in =3.6v 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 0.00 0.05 0.10 0.15 0.20 0.25 0.30 output voltage (v) output current (a) increasing load decreasing load v in = 3.6v v out = 1.8v mcp1754/mcp1754s ds22276a-page 14 ? 2011 microchip technology inc. note: unless otherwise indicated v r = 3.3v, c out = 1 f ceramic (x7r), c in = 1 f ceramic (x7r), i l = 1 ma, t a = +25 c, v in = v r + 1v or v in = 3.6v (whichever is greater), shdn = v in , package = sot223. figure 2-30: short circuit current foldback. figure 2-31: short circuit current foldback. figure 2-32: dynamic load response. figure 2-33: dynamic load response. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 output voltage (v) output current (a) increasing load decreasing load v in = 4.3v v out = 3.3v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 output voltage (v) output current (a) increasing load decreasing load v in = 6v v out = 5v ? 2011 microchip technology inc. ds22276a-page 15 mcp1754/mcp1754s 3.0 pin descriptions the descriptions of the pins are listed in tab l e 3 - 1 and table 3-2 . 3.1 ground terminal (gnd) regulator ground. tie gnd to the negative side of the output and the negative side of the input capacitor. only the ldo bias current flows out of this pin; there is no high current. the ldo output regulation is referenced to this pin. minimize voltage drops between this pin and the negative side of the load. 3.2 regulated output voltage (v out ) connect v out to the positive side of the load and the positive terminal of the output capacitor. the positive side of the output capacitor should be physically located as close to the ldo v out pin as is practical. the current flowing out of this pin is equal to the dc load current. 3.3 unregulated input voltage (v in ) connect v in to the input unregulated source voltage. like all low dropout linear regulators, low source impedance is necessary for the stable operation of the ldo. the amount of capacitance required to ensure low source impedance will depend on the proximity of the input source capacitors or battery type. for most applications, 1 f of capacitance will ensure stable operation of the ldo circuit. the input capacitor should have a capacitance value equal to or larger than the output capacitor for performance applications. the input capacitor will supply the load current during transients and improve performance. for applications that have load currents below 10 ma, the input capacitance requirement can be lowered. the type of capacitor used may be ceramic, tantalum or aluminum electrolytic. the low esr characteristics of the ceramic will yield better noise and psrr performance at high- frequency. table 3-1: mcp1754 pin function table pin no. sot223-5 pin no. sot23-5 pin no. 2x3 dfn name function 3 2 4 gnd ground terminal 451v out regulated voltage output 218v in unregulated supply voltage ?? 3,6,7 nc no connection 5 4 2 pwrgd open drain power good output 1 3 5 shdn shutdown input ep ? ep gnd exposed pad, connected to gnd table 3-2: mcp1754s pin function table pin no. sot223-3 pin no. sot23a pin no. sot89 pin no. 2x3 dfn name function 2 1 2 4 gnd ground terminal 3231v out regulated voltage output 1318v in unregulated supply voltage ??? 2,3,5,6,7 nc no connection ep ? ep ep gnd exposed pad, connected to gnd mcp1754/mcp1754s ds22276a-page 16 ? 2011 microchip technology inc. 3.4 shutdown input (shdn ) the shdn input is used to turn the ldo output voltage on and off. when the shdn input is at a logic-high level, the ldo output voltage is enabled. when the shdn input is pulled to a logic-low level, the ldo output voltage is disabled. when the shdn input is pulled low, the pwrgd output also goes low and the ldo enters a low quiescent current shutdown state. 3.5 power good output (pwrgd) for fixed applications, the pwrgd output is an open- drain output used to indicate when the ldo output voltage is within 92% (typically) of its nominal regulation value. the pwrgd threshold has a typical hysteresis value of 2%. the pwrgd output is delayed by 100 s (typical) from the time the ldo output is within 92% + 2% (typical hysteresis) of the regulated output value on power-up. this delay time is internally fixed. the pwrgd pin may be pulled up to v in or v out . pulling up to v out conserves power when the device is in shutdown (/shdn = 0v) mode. 3.6 exposed pad (ep) some of the packages have an exposed metal pad on the bottom of the package. the exposed metal pad gives the device better thermal characteristics by providing a good thermal path to either the pcb or heat sink to remove heat from the device. the exposed pad of the package is internally connected to gnd. ? 2011 microchip technology inc. ds22276a-page 17 mcp1754/mcp1754s 4.0 device overview the mcp1754/mcp1754s is a 150 ma output current, low dropout (ldo) voltage regulator. the low dropout voltage of 300 mv typical at 150 ma of current makes it ideal for battery-powered applications. the input voltage range is 3.6v to 16.0v. unlike other high output current ldos, the mcp1754/mcp1754s typically draws only 150 a of quiescent current for a 150 ma load. the mcp1754 adds a shutdown control input pin and a power good output pin. the output voltage options are fixed. 4.1 ldo output voltage the mcp1754/mcp1754s ldo has a fixed output voltage. the output voltage range is 1.8v to 5.5v. 4.2 output current and current limiting the mcp1754/mcp1754s ldo is tested and ensured to supply a minimum of 150 ma of output current. the mcp1754/mcp1754s has no minimum output load, so the output load current can go to 0 ma and the ldo will continue to regulate the output voltage to within tolerance. the mcp1754/mcp1754s also incorporates a true output current foldback. if the output load presents an excessive load due to a low impedance short circuit condition, the output current and voltage will fold back towards 30 ma and 0v respectively. the output voltage and current will resume normal levels when the excessive load is removed. if the overload condition is a soft overload, the mcp1754/ mcp1754s will supply higher load currents of up to typically 250 ma. this allows for device usage in applications that have pulsed load currents having an average output current value of 150 ma or less. output overload conditions may also result in an over- temperature shutdown of the device. if the junction temperature rises above 150c (typical), the ldo will shut down the output. see section 4.8 ?overtemperature protection? for more information on overtemperature shutdown. 4.3 output capacitor the mcp1754/mcp1754s requires a minimum output capacitance of 1 f for output voltage stability. ceramic capacitors are recommended because of their size, cost and environmentally robust qualities. aluminum-electrolytic and tantalum capacitors can be used on the ldo output as well. the equivalent series resistance (esr) of the electrolytic output capacitor should be no greater than 2.0 . the output capacitor should be located as close to the ldo output as is practical. ceramic materials x7r and x5r have low temperature coefficients and are well within the acceptable esr range required. a typical 1 f x7r 0805 capacitor has an esr of 50 milliohms. larger ldo output capacitors can be used with the mcp1754/mcp1754s to improve dynamic performance and power supply ripple rejection performance. a maximum of 1000 f is recommended. aluminum-electrolytic capacitors are not recommended for low temperature applications of < -25c. figure 4-1: typical current foldback. 2 3 4 5 6 v out (v) typical current foldback - 5v output increasing load decreasing load 0 1 2 0.000 0.050 0.100 0.150 0.200 0.250 v i out (a) mcp1754/mcp1754s ds22276a-page 18 ? 2011 microchip technology inc. 4.4 input capacitor low input source impedance is necessary for the ldo output to operate properly. when operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the ldo, some input capacitance is recommended. a minimum of 1.0 f to 4.7 f is recommended for most applications. for applications that have output step load requirements, the input capacitance of the ldo is very important. the input capacitance provides the ldo with a good local low-impedance source to pull the transient currents from in order to respond quickly to the output load step. for good step response performance, the input capacitor should be of equivalent or higher value than the output capacitor. the capacitor should be placed as close to the input of the ldo as is practical. larger input capacitors will also help reduce any high-frequency noise on the input and output of the ldo and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the ldo. 4.5 power good output (pwrgd) the open drain pwrgd output is used to indicate when the output voltage of the ldo is within 94% (typical value, see section 1.0 ?electrical characteristics? for minimum and maximum specifications) of its nominal regulation value. as the output voltage of the ldo rises, the open drain pwrgd output will actively be held low until the output voltage has exceeded the power good threshold plus the hysteresis value. once this threshold has been exceeded, the power good time delay is started (shown as t pg in the electrical characteristics table). the power good time delay is fixed at 100 s (typical). after the time delay period, the pwrgd open drain output becomes inactive and may be pulled high by an external pullup resistor, indicating that the output voltage is stable and within regulation limits. the power good output is typically pulled up to v in or v out . pulling the signal up to v out conserves power during shutdown mode. if the output voltage of the ldo falls below the power good threshold, the power good output will transition low. the power good circuitry has a 200 s delay when detecting a falling output voltage, which helps to increase noise immunity of the power good output and avoid false triggering of the power good output during fast output transients. see figure 4-2 for power good timing characteristics. when the ldo is put into shutdown mode using the shdn input, the power good output is pulled low immediately, indicating that the output voltage will be out of regulation. the timing diagram for the power good output when using the shutdown input is shown in figure 4-3 . the power good output is an open-drain output that can be pulled up to any voltage that is equal to or less than the ldo input voltage. this output is capable of sinking 1.2 ma minimum (v pwrgd < 0.4v maximum). figure 4-2: power good timing. figure 4-3: power good timing from shutdown. 4.6 shutdown input (shdn ) the shdn input is an active-low input signal that turns the ldo on and off. the shdn threshold is a fixed voltage level. the minimum value of this shutdown threshold required to turn the output on is 2.4v. the maximum value required to turn the output off is 0.8v. tpg tvdet_pwrgd vpwrgd_th vout pwrgd vol voh v in shdn v out t delay_shdn pwrgd t pg ? 2011 microchip technology inc. ds22276a-page 19 mcp1754/mcp1754s the shdn input will ignore low-going pulses (pulses meant to shut down the ldo) that are up to 400 ns in pulse width. if the shutdown input is pulled low for more than 400 ns, the ldo will enter shutdown mode. this small bit of filtering helps to reject any system noise spikes on the shutdown input signal. on the rising edge of the shdn input, the shutdown circuitry has a 30 s delay before allowing the ldo output to turn on. this delay helps to reject any false turn-on signals or noise on the shdn input signal. after the 30 s delay, the ldo output enters its soft-start period as it rises from 0v to its final regulation value. if the shdn input signal is pulled low during the 30 s delay period, the timer will be reset and the delay time will start over again on the next rising edge of the shdn input. the total time from the shdn input going high (turn-on) to the ldo output being in regulation is typically 100 s. see figure 4-4 for a timing diagram of the shdn input. figure 4-4: shutdown input timing diagram. 4.7 dropout voltage and undervoltage lockout dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below the nominal value that was measured with a v r + 1.0v differential applied. the mcp1754/ mcp1754s ldo has a very low dropout voltage specification of 300 mv (typical) at 150 ma of output current. see section 1.0 ?electrical characteristics? for maximum dropout voltage specifications. the mcp1754/mcp1754s ldo operates across an input voltage range of 3.6v to 16.0v and incorporates input undervoltage lockout (uvlo) circuitry that keeps the ldo output voltage off until the input voltage reaches a minimum of 2.95v (typical) on the rising edge of the input voltage. as the input voltage falls, the ldo output will remain on until the input voltage level reaches 2.70v (typical). for high-current applications, voltage drops across the pcb traces must be taken into account. the trace resistances can cause significant voltage drops between the input voltage source and the ldo. for applications with input voltages near 3.0v, these pcb trace voltage drops can sometimes lower the input voltage enough to trigger a shutdown due to undervoltage lockout. 4.8 overtemperature protection the mcp1754/mcp1754s ldo has temperature- sensing circuitry to prevent the junction temperature from exceeding approximately 150 c. if the ldo junction temperature does reach 150 c, the ldo output will be turned off until the junction temperature cools to approximately 137 c, at which point the ldo output will automatically resume normal operation. if the internal power dissipation continues to be excessive, the device will again shut off. the junction temperature of the die is a function of power dissipation, ambient temperature and package thermal resistance. see section 5.0 ?application circuits & issues? for more information on ldo power dissipation and junction temperature. shdn v out 30 s 70 s t delay_shdn 400 ns (typ) mcp1754/mcp1754s ds22276a-page 20 ? 2011 microchip technology inc. notes: ? 2011 microchip technology inc. ds22276a-page 21 mcp1754/mcp1754s 5.0 application circuits & issues 5.1 typical application the mcp1754/mcp1754s is most commonly used as a voltage regulator. it?s low quiescent current and low dropout voltage make it ideal for many battery-powered applications. figure 5-1: typical application circuit. 5.1.1 application input conditions 5.2 power calculations 5.2.1 power dissipation the internal power dissipation of the mcp1754/ mcp1754s is a function of input voltage, output voltage and output current. the power dissipation, as a result of the quiescent current draw, is so low, it is insignificant (56.0 a x v in ). the following equation can be used to calculate the internal power dissipation of the ldo. equation the maximum continuous operating junction temperature specified for the mcp1754/mcp1754s is +150 c . to estimate the internal junction temperature of the mcp1754/mcp1754s, the total internal power dissipation is multiplied by the thermal resistance from junction to ambient (r ja ). the thermal resistance from junction to ambient for the sot23a pin package is estimated at 336 c/w. equation the maximum power dissipation capability for a package can be calculated given the junction-to- ambient thermal resistance and the maximum ambient temperature for the application. the following equation can be used to determine the package maximum internal power dissipation. equation equation equation package type = sot23 input voltage range = 3.6v to 4.8v v in maximum = 4.8v v out typical = 1.8v i out = 50 ma maximum mcp1754s gnd v out v in c in 1f ceramic c out 1f ceramic v out v in 3.6v to 4.8v 1.8v i out 50 ma p ldo v in max ) () v out min () ? () i out max ) () = p ldo = ldo pass device internal power dissipation v in(max) = maximum input voltage v out(min) = ldo minimum output voltage t jmax () p total r ja t amax + = t j(max) = maximum continuous junction temperature p total = total device power dissipation r ja = thermal resistance from junction to ambient t amax = maximum ambient temperature p dmax () t jmax () t amax () ? () r ja --------------------------------------------------- = p d(max) = maximum device power dissipation t j(max) = maximum continuous junction temperature t a(max) = maximum ambient temperature r ja = thermal resistance from junction to ambient t jrise () p dmax () r ja = t j(rise) = rise in device junction temperature over the ambient temperature p d(max) = maximum device power dissipation r ja = thermal resistance from junction to ambient t j t jrise () t a + = t j = junction temperature t j(rise) = rise in device junction temperature over the ambient temperature t a = ambient temperature mcp1754/mcp1754s ds22276a-page 22 ? 2011 microchip technology inc. 5.3 voltage regulator internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. the power dissipation, as a result of ground current, is small enough to be neglected . 5.3.1 power dissipation example device junction temperature rise the internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction to ambient for the application. the thermal resistance from junction to ambient (r ja ) is derived from an eia/jedec standard for measuring thermal resistance for small surface mount packages. the eia/ jedec specification is jesd51-7, ?high effective thermal conductivity test board for leaded surface mount packages?. the standard describes the test method and board specifications for measuring the thermal resistance from junction to ambient. the actual thermal resistance for a particular application can vary depending on many factors, such as copper area and thickness. refer to an792, ?a method to determine how much power a sot23 can dissipate in an application?, (ds00792), for more information regarding this subject. junction temperature estimate to estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. for this example, the worst-case junction temperature is estimated below. maximum package power dissipation examples at +40c ambient temperature 5.4 voltage reference the mcp1754/mcp1754s can be used not only as a regulator, but also as a low quiescent current voltage reference. in many microcontroller applications, the initial accuracy of the reference can be calibrated using production test equipment or by using a ratio measurement. when the initial accuracy is calibrated, the thermal stability and line regulation tolerance are the only errors introduced by the mcp1754/ mcp1754s ldo. the low cost, low quiescent current and small ceramic output capacitor are all advantages when using the mcp1754/mcp1754s as a voltage reference. figure 5-2: using the mcp1754/mcp1754s as a voltage reference. 5.5 pulsed load applications for some applications, there are pulsed load current events that may exceed the specified 150 ma maximum specification of the mcp1754/mcp1754s. the internal current limit of the mcp1754/mcp1754s will prevent high peak load demands from causing non- recoverable damage. the 150 ma rating is a maximum average continuous rating. as long as the average current does not exceed 150 ma, pulsed higher load currents can be applied to the mcp1754/mcp1754s . the typical current limit for the mcp1754/mcp1754s is 250 ma (t a +25c). package package type = sot23 input voltage v in = 3.6v to 4.8v ldo output voltages and currents v out = 1.8v i out =50ma maximum ambient temperature t a(max) = +40c internal power dissipation internal power dissipation is the product of the ldo output current times the voltage across the ldo (v in to v out ). p ldo(max) =(v in(max) - v out(min) ) x i out(max) p ldo = (4.8v - (0.97 x 1.8v)) x 50 ma p ldo = 152.7 milli-watts t j(rise) =p total x rq ja t jrise = 152.7 milliwatts x 336.0 c/watt t jrise =51.3 c t j =t jrise + t a(max) t j =91.3c sot23 (336.0c/watt = r ja ) p d(max) = (125c - 40c) / 336c/w p d(max) = 253 milliwatts sot89 (153.3c/watt = r ja ) p d(max) = (125c - 40c) / 153.3c/w p d(max) = 554 milliwatts picmicro ? mcp1754s gnd v in c in 1f c out 1f bridge sensor v out v ref ado ad1 ratio metric reference 56 a bias microcontroller ? 2011 microchip technology inc. ds22276a-page 23 mcp1754/mcp1754s 6.0 packaging information 6.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e xxxxxxx nnn xxxyyww 3-lead sot-223 (mcp1754s) example: 1754s18 edb1130 256 part number code mcp1754st-3302e/db 1754s33 mcp1754st-5002e/db 1754s50 3-lead sot-23a (mcp1754s) example: xxnn nnn 3-lead sot-89 (mcp1754s) example: jc25 mt1130 256 part number code mcp1754st-1802e/cb jcnn mcp1754st-3302e/cb jdnn mcp1754st-5002e/cb jenn part number code mcp1754st-1802e/mb mtyyww mcp1754st-3302e/mb muyyww mcp1754st-5002e/mb mvyyww mcp1754/mcp1754s ds22276a-page 24 ? 2011 microchip technology inc. package marking information (continued) legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e xxnn 5-lead sot-23 (2x3) (mcp1754) example: yq25 xxxyyww nnn xxxxxxx 5-lead sot-223 (mcp1754) example: 175418 edc1130 256 part number code mcp1754t-1802e/ot yqnn mcp1754t-3302e/ot yrnn mcp1754t-5002e/ot ysnn part number code mcp1754t-1802e/dc 175418 mcp1754t-3302e/dc 175433 mcp1754t-5002e/dc 175450 8-lead dfn (2x3) (mcp1754) example: part number code part number code mcp1754-1802e/mc akg mcp1754s-1802e/mc aln mcp1754-3302e/mc akh mcp1754s-3302e/mc alm mcp1754-5002e/mc akj mcp1754s-5002e/mc all mcp1754t-1802e/mc akg mcp1754st-1802e/mc aln mcp1754t-3302e/mc akh mcp1754st-3302e/mc alm mcp1754t-5002e/mc akj mcp1754st-5002e/mc all akj 130 25 ? 2011 microchip technology inc. ds22276a-page 25 mcp1754/mcp1754s !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %4 ! 5 4 !1# )* 6$# !4 !1# 9)* 6, : # ; ; < # ! %% ; !!1 / : # ( 9 6, =!# " 9 !!1 / =!# " ( 6, 4# 9 9( 9 4 ! / ( 4 !=!# 8 9 9 < 84 !=!# 8 . #4# 4 ( ; ; 4 ! > ; > d b2 e e1 1 2 3 e e1 a a2 a1 b c l - * ) mcp1754/mcp1754s ds22276a-page 26 ? 2011 microchip technology inc. . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / ? 2011 microchip technology inc. ds22276a-page 27 mcp1754/mcp1754s !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 4 !1# ()* 6$# !4 !1# )* 6, : # < ; ( !!1 / / ; # ! %% ; ( 6, =!# " ; !!1 / =!# " ; < 6, 4# ; . #4# 4 ( ; 9 . # > ; > 4 ! / ; 9 4 !=!# 8 ; ( d e e1 2 1 e e1 n b a a1 a2 c l - * ) mcp1754/mcp1754s ds22276a-page 28 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2011 microchip technology inc. ds22276a-page 29 mcp1754/mcp1754s !"! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 7 5$ 8 %4 ! 5 1# ()* 6$# !4 !1# )* 6, : # 9 6, =!# : ( !!1 / =!# #) " 9 !!1 / =!# # " 6, 4# 9 84# < . #4# 4 4 ! / ( 4 !=!# 8 (9 4 ! ? =!# 8 9 < d d1 e h n b1 e1 b 2 1 e b1 l a c e1 - *) mcp1754/mcp1754s ds22276a-page 30 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2011 microchip technology inc. ds22276a-page 31 mcp1754/mcp1754s !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ( 4 !1# ()* 6$# !4 !1# )* 6, : # ; ( !!1 / / < ; # ! %% ; ( 6, =!# " ; !!1 / =!# " ; < 6, 4# ; . #4# 4 ; 9 . # # 4 ( ; < . # > ; > 4 ! / < ; 9 4 !=!# 8 ; ( n b e e1 d 1 2 3 e e1 a a1 a2 c l l1 - * ) mcp1754/mcp1754s ds22276a-page 32 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2011 microchip technology inc. ds22276a-page 33 mcp1754/mcp1754s !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %4 ! 5 ( 4 !1# )* 6$# !4 !1# (<)* 6, : # ; ; < # ! %% 9 !!1 / : # (( 9 9( 6, =!# " 9<9 9 !!1 / =!# " ( ( (( 6, 4# 9( 9( 9(( 4 ! / < 4 !=!# 8 ( ( 84 !=!# 8 ( ( . #4# 4 ; 4 ! > > <> d b2 e e1 1 2 34 n e e1 a2 a b a1 c l - * ) mcp1754/mcp1754s ds22276a-page 34 ? 2011 microchip technology inc. . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / ? 2011 microchip technology inc. ds22276a-page 35 mcp1754/mcp1754s 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! 1 / , & !#8 #! 1 / - $ #! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 < 1# ()* 6, : # < # ! %% ( * # # / ". 6, 4# )* 6, =!# " )* "& !1 !4# ; (( "& !1 !=!# " ( ; ( * # #=!# 8 ( * # #4# 4 ( * # ## "& !1 ! @ ; ; d n e note 1 1 2 exposed pad note 1 2 1 d2 k l e2 n e b a3 a1 a note 2 bottom view top view - * * mcp1754/mcp1754s ds22276a-page 36 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2011 microchip technology inc. ds22276a-page 37 mcp1754/mcp1754s appendix a: revision history revision a (august 2011) ? original data sheet for the mcp1754/mcp1754s family of devices. mcp1754/mcp1754s ds22276a-page 38 ? 2011 microchip technology inc. notes: ? 2011 microchip technology inc. ds22276a-page 39 mcp1754/mcp1754s product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . mcp1754: 150 ma, 16v high performance ldo mcp1754t: 150 ma, 16v high performance ldo (tape and reel) (sot) mcp1754s: 150 ma, 16v high performance ldo mcp1754st: 150 ma, 16v high performance ldo (tape and reel) (sot) tape and reel: t = tape and reel output voltage*: 18 = 1.8v ?standard? 33 = 3.3v ?standard? 50 = 5.0v ?standard? *contact factory for other voltage options extra feature code: 0 = fixed tolerance: 2 = 2% (standard) temperature range: e = -40c to +125c package: *db = plastic small outline, (sot-223), 3-lead cb = plastic small outline, (sot-23a), 3-lead mb = plastic small outline, (sot-89), 3-lead dc = plastic small outline, (sot223), 5-lead ot = plastic small outline, (sot-23), 5-lead mc = plastic dual flat, no lead, (2x3 dfn), 8-lead *note: the 3-lead sot-223 (db) is not a standard package for output voltages below 3.0v part no. x- x x package tape and reel device examples: a) mcp1754t-1802e/dc: 1.8v, 5ld sot-223, tape and reel b) mcp1754t-3302e/dc: 3.3v, 5ld sot-223, tape and reel c) mcp1754t-5002e/dc: 5.0v, 5ld sot-223, tape and reel a) mcp1754t-1802e/cb: 1.8v, 3ld sot-23a, tape and reel b) mcp1754t-3302e/cb: 3.3v, 3ld sot-23a, tape and reel c) mcp1754t-5002e/cb: 5.0v, 3ld sot-23a, tape and reel a) mcp1754t-1802e/mb: 1.8v, 3ld sot-89, tape and reel b) mcp1754t-3302e/mb: 3.3v, 3ld sot-89, tape and reel c) mcp1754t-5002e/mb: 5.0v, 3ld sot-89, tape and reel a) mcp1754t-1802e/ot: 1.8v, 5ld sot-23, tape and reel b) mcp1754t-3302e/ot: 3.3v, 5ld sot-23, tape and reel c) mcp1754t-5002e/ot: 5.0v, 5ld sot-23, tape and reel a) mcp1754t-1802e/mc: 1.8v, 8ld dfn, tape and reel b) mcp1754t-3302e/mc: 3.3v, 8ld dfn, tape and reel c) mcp1754t-5002e/mc: 5.0v, 8ld dfn, tape and reel a) mcp1754st-1802e/mc: 1.8v, 8ld dfn, tape and reel b) mcp1754st-3302e/mc: 3.3v, 8ld dfn, tape and reel c) mcp1754st-5002e/mc: 5.0v, 8ld dfn, tape and reel a) mcp1754st-3302e/db: 3.3v, 3ld sot-223, tape and reel b) mcp1754st-5002e/db: 5.0v, 3ld sot-223, tape and reel x/ temp. x tolerance x feature code xx output voltage mcp1754/mcp1754s ds22276a-page 40 ? 2011 microchip technology inc. notes: ? 2011 microchip technology inc. ds22276a-page 41 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, app lication maestro, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-570-2 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. ds22276a-page 42 ? 2011 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3187 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 08/02/11 |
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